Programming options for nanocrystal MOS memories

Isodiana Crupi, Lombardo, Corso, Isodiana Crupi, Ammendola, Gerardi

Risultato della ricerca: Article

1 Citazione (Scopus)

Abstract

Nanocrystal memories represent a promising candidate for the scaling of FLASH memories. In these devices, the charge is not stored in a continuous floating gate but in a discontinuous layer composed by numerous discrete silicon quantum dots well separated one from the other.The nanocrystals of radius of few nanometers are realized by chemical vapor deposition (CVD) of silicon on the tunnel oxide of 2.8 nm of thickness. These islands have been coated with a control oxide of 7 nm formed by CVD and incorporated in Metal-Oxide-Semiconductor structure. The devices are programmed and erased by tunnelling using low voltages and fast times. In addition, the programming can be easily achieved also by channel hot electron injection (CHEI). Furthermore, such nanocrystal memory cells have been extensively characterized in order to study the possibility to achieve dual bit operation. In fact, during channel hot electron programming, the charge can be selectively injected only at the drain-side of the cell. This remains there localized due to the presence of the SiO2 between the grains which limits the lateral charge flow. The asymmetric charge distribution represents the key concept to the multi-bit storage. In this work, we show experimental evidence of such asymmetry. © 2003 Elsevier B.V. All rights reserved.
Lingua originaleEnglish
pagine (da-a)687-689
Numero di pagine3
RivistaMATERIALS SCIENCE AND ENGINEERING. C, BIOMIMETIC MATERIALS, SENSORS AND SYSTEMS
Volume23
Stato di pubblicazionePublished - 2003

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programming
Computer programming
Nanocrystals
nanocrystals
Hot electrons
Silicon
hot electrons
Data storage equipment
Oxides
Chemical vapor deposition
vapor deposition
Electron injection
oxides
Charge distribution
silicon
cells
metal oxide semiconductors
low voltage
charge distribution
floating

All Science Journal Classification (ASJC) codes

  • Materials Science(all)
  • Condensed Matter Physics
  • Mechanics of Materials
  • Mechanical Engineering

Cita questo

Programming options for nanocrystal MOS memories. / Crupi, Isodiana; Lombardo; Corso; Crupi, Isodiana; Ammendola; Gerardi.

In: MATERIALS SCIENCE AND ENGINEERING. C, BIOMIMETIC MATERIALS, SENSORS AND SYSTEMS, Vol. 23, 2003, pag. 687-689.

Risultato della ricerca: Article

Crupi, Isodiana ; Lombardo ; Corso ; Crupi, Isodiana ; Ammendola ; Gerardi. / Programming options for nanocrystal MOS memories. In: MATERIALS SCIENCE AND ENGINEERING. C, BIOMIMETIC MATERIALS, SENSORS AND SYSTEMS. 2003 ; Vol. 23. pagg. 687-689.
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abstract = "Nanocrystal memories represent a promising candidate for the scaling of FLASH memories. In these devices, the charge is not stored in a continuous floating gate but in a discontinuous layer composed by numerous discrete silicon quantum dots well separated one from the other.The nanocrystals of radius of few nanometers are realized by chemical vapor deposition (CVD) of silicon on the tunnel oxide of 2.8 nm of thickness. These islands have been coated with a control oxide of 7 nm formed by CVD and incorporated in Metal-Oxide-Semiconductor structure. The devices are programmed and erased by tunnelling using low voltages and fast times. In addition, the programming can be easily achieved also by channel hot electron injection (CHEI). Furthermore, such nanocrystal memory cells have been extensively characterized in order to study the possibility to achieve dual bit operation. In fact, during channel hot electron programming, the charge can be selectively injected only at the drain-side of the cell. This remains there localized due to the presence of the SiO2 between the grains which limits the lateral charge flow. The asymmetric charge distribution represents the key concept to the multi-bit storage. In this work, we show experimental evidence of such asymmetry. {\circledC} 2003 Elsevier B.V. All rights reserved.",
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N2 - Nanocrystal memories represent a promising candidate for the scaling of FLASH memories. In these devices, the charge is not stored in a continuous floating gate but in a discontinuous layer composed by numerous discrete silicon quantum dots well separated one from the other.The nanocrystals of radius of few nanometers are realized by chemical vapor deposition (CVD) of silicon on the tunnel oxide of 2.8 nm of thickness. These islands have been coated with a control oxide of 7 nm formed by CVD and incorporated in Metal-Oxide-Semiconductor structure. The devices are programmed and erased by tunnelling using low voltages and fast times. In addition, the programming can be easily achieved also by channel hot electron injection (CHEI). Furthermore, such nanocrystal memory cells have been extensively characterized in order to study the possibility to achieve dual bit operation. In fact, during channel hot electron programming, the charge can be selectively injected only at the drain-side of the cell. This remains there localized due to the presence of the SiO2 between the grains which limits the lateral charge flow. The asymmetric charge distribution represents the key concept to the multi-bit storage. In this work, we show experimental evidence of such asymmetry. © 2003 Elsevier B.V. All rights reserved.

AB - Nanocrystal memories represent a promising candidate for the scaling of FLASH memories. In these devices, the charge is not stored in a continuous floating gate but in a discontinuous layer composed by numerous discrete silicon quantum dots well separated one from the other.The nanocrystals of radius of few nanometers are realized by chemical vapor deposition (CVD) of silicon on the tunnel oxide of 2.8 nm of thickness. These islands have been coated with a control oxide of 7 nm formed by CVD and incorporated in Metal-Oxide-Semiconductor structure. The devices are programmed and erased by tunnelling using low voltages and fast times. In addition, the programming can be easily achieved also by channel hot electron injection (CHEI). Furthermore, such nanocrystal memory cells have been extensively characterized in order to study the possibility to achieve dual bit operation. In fact, during channel hot electron programming, the charge can be selectively injected only at the drain-side of the cell. This remains there localized due to the presence of the SiO2 between the grains which limits the lateral charge flow. The asymmetric charge distribution represents the key concept to the multi-bit storage. In this work, we show experimental evidence of such asymmetry. © 2003 Elsevier B.V. All rights reserved.

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