The problem of evaluating the limit performances of cascaded single-ended multi-stage transistor amplifiers is addressed. In particular, a theoretically rigorous approach is proposed for the determination of a family of optimal design curves (ODC's) which express the best (maximum optimal) noise-gain tradeoff that can be achieved - at each operating frequency - when a simultaneous constraint on amplifier input VSWR is accounted for.
| Lingua originale | English |
|---|
| Pagine | 746-749 |
|---|
| Numero di pagine | 4 |
|---|
| Stato di pubblicazione | Published - 2007 |
|---|
- Electronic, Optical and Magnetic Materials
- Electrical and Electronic Engineering
Cita questo
-
APA
-
Standard
-
Harvard
-
Vancouver
-
Author
-
BIBTEX
-
RIS
@conference{95eaa4bf5be6485d89035b11b509abfe,
title = "On the Theoretical Limits of Noise-Gain-Mismatch Tradeoff in the Design of Multi-Stage Cascaded Transistor Amplifiers",
abstract = "The problem of evaluating the limit performances of cascaded single-ended multi-stage transistor amplifiers is addressed. In particular, a theoretically rigorous approach is proposed for the determination of a family of optimal design curves (ODC's) which express the best (maximum optimal) noise-gain tradeoff that can be achieved - at each operating frequency - when a simultaneous constraint on amplifier input VSWR is accounted for.",
author = "Enrico Calandra and {Di Maio}, Bruno and Daniele Lupo",
year = "2007",
language = "English",
pages = "746--749",
}
TY - CONF
T1 - On the Theoretical Limits of Noise-Gain-Mismatch Tradeoff in the Design of Multi-Stage Cascaded Transistor Amplifiers
AU - Calandra, Enrico
AU - Di Maio, Bruno
AU - Lupo, Daniele
PY - 2007
Y1 - 2007
N2 - The problem of evaluating the limit performances of cascaded single-ended multi-stage transistor amplifiers is addressed. In particular, a theoretically rigorous approach is proposed for the determination of a family of optimal design curves (ODC's) which express the best (maximum optimal) noise-gain tradeoff that can be achieved - at each operating frequency - when a simultaneous constraint on amplifier input VSWR is accounted for.
AB - The problem of evaluating the limit performances of cascaded single-ended multi-stage transistor amplifiers is addressed. In particular, a theoretically rigorous approach is proposed for the determination of a family of optimal design curves (ODC's) which express the best (maximum optimal) noise-gain tradeoff that can be achieved - at each operating frequency - when a simultaneous constraint on amplifier input VSWR is accounted for.
UR - http://hdl.handle.net/10447/33122
M3 - Other
SP - 746
EP - 749
ER -