On the Theoretical Limits of Noise-Gain-Mismatch Tradeoff in the Design of Multi-Stage Cascaded Transistor Amplifiers

The problem of evaluating the limit performances of cascaded single-ended multi-stage transistor amplifiers is addressed. In particular, a theoretically rigorous approach is proposed for the determination of a family of optimal design curves (ODC's) which express the best (maximum optimal) noise-gain tradeoff that can be achieved - at each operating frequency - when a simultaneous constraint on amplifier input VSWR is accounted for.