Nanocrystal memories for FLASH device applications

Isodiana Crupi, Barbara Desalvo, Marco Bileci, Domenico Corso, Virginia Triolo, Giuseppe Ammendola, Cosimo Gerardi, Salvatore Lombardo, Luca Perniola, Valentina Ancarani

Risultato della ricerca: Article

35 Citazioni (Scopus)

Abstract

Nanocrystals memory cells, in which the conventional polysilicon floating gate is replaced by an array of silicon nanocrystals, have been fabricated and characterized. Single cells and cell arrays of 1 Mb and 10 k have been realized by using a conventional 0.15 μm FLASH technology. Si nanocrystals are deposited on top of tunnel oxide by chemical vapor deposition. Properties of the memory cell have been investigated both for NAND and NOR applications in terms of program/erase window and programming times. Suitable program/erase threshold voltage window can be achieved with fast voltage pulses by adequate choice of tunnel and control dielectric. The feasibility of dual bit storage is also proven showing that the nanocrystals are separated and the inter-dot tunneling is inhibited. Good endurance and retention behaviors are demonstrated even after long cycling. © 2004 Elsevier Ltd. All rights reserved.
Lingua originaleEnglish
pagine (da-a)1483-1488
Numero di pagine6
RivistaSolid-State Electronics
Volume48
Stato di pubblicazionePublished - 2004

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Nanocrystals
nanocrystals
Data storage equipment
cells
tunnels
Tunnels
endurance
Silicon
programming
Threshold voltage
Polysilicon
threshold voltage
Oxides
floating
Chemical vapor deposition
Durability
vapor deposition
cycles
oxides
Electric potential

All Science Journal Classification (ASJC) codes

  • Electronic, Optical and Magnetic Materials
  • Electrical and Electronic Engineering
  • Materials Chemistry
  • Condensed Matter Physics

Cita questo

Crupi, I., Desalvo, B., Bileci, M., Corso, D., Triolo, V., Ammendola, G., ... Ancarani, V. (2004). Nanocrystal memories for FLASH device applications. Solid-State Electronics, 48, 1483-1488.

Nanocrystal memories for FLASH device applications. / Crupi, Isodiana; Desalvo, Barbara; Bileci, Marco; Corso, Domenico; Triolo, Virginia; Ammendola, Giuseppe; Gerardi, Cosimo; Lombardo, Salvatore; Perniola, Luca; Ancarani, Valentina.

In: Solid-State Electronics, Vol. 48, 2004, pag. 1483-1488.

Risultato della ricerca: Article

Crupi, I, Desalvo, B, Bileci, M, Corso, D, Triolo, V, Ammendola, G, Gerardi, C, Lombardo, S, Perniola, L & Ancarani, V 2004, 'Nanocrystal memories for FLASH device applications', Solid-State Electronics, vol. 48, pagg. 1483-1488.
Crupi I, Desalvo B, Bileci M, Corso D, Triolo V, Ammendola G e altri. Nanocrystal memories for FLASH device applications. Solid-State Electronics. 2004;48:1483-1488.
Crupi, Isodiana ; Desalvo, Barbara ; Bileci, Marco ; Corso, Domenico ; Triolo, Virginia ; Ammendola, Giuseppe ; Gerardi, Cosimo ; Lombardo, Salvatore ; Perniola, Luca ; Ancarani, Valentina. / Nanocrystal memories for FLASH device applications. In: Solid-State Electronics. 2004 ; Vol. 48. pagg. 1483-1488.
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AU - Crupi, Isodiana

AU - Desalvo, Barbara

AU - Bileci, Marco

AU - Corso, Domenico

AU - Triolo, Virginia

AU - Ammendola, Giuseppe

AU - Gerardi, Cosimo

AU - Lombardo, Salvatore

AU - Perniola, Luca

AU - Ancarani, Valentina

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N2 - Nanocrystals memory cells, in which the conventional polysilicon floating gate is replaced by an array of silicon nanocrystals, have been fabricated and characterized. Single cells and cell arrays of 1 Mb and 10 k have been realized by using a conventional 0.15 μm FLASH technology. Si nanocrystals are deposited on top of tunnel oxide by chemical vapor deposition. Properties of the memory cell have been investigated both for NAND and NOR applications in terms of program/erase window and programming times. Suitable program/erase threshold voltage window can be achieved with fast voltage pulses by adequate choice of tunnel and control dielectric. The feasibility of dual bit storage is also proven showing that the nanocrystals are separated and the inter-dot tunneling is inhibited. Good endurance and retention behaviors are demonstrated even after long cycling. © 2004 Elsevier Ltd. All rights reserved.

AB - Nanocrystals memory cells, in which the conventional polysilicon floating gate is replaced by an array of silicon nanocrystals, have been fabricated and characterized. Single cells and cell arrays of 1 Mb and 10 k have been realized by using a conventional 0.15 μm FLASH technology. Si nanocrystals are deposited on top of tunnel oxide by chemical vapor deposition. Properties of the memory cell have been investigated both for NAND and NOR applications in terms of program/erase window and programming times. Suitable program/erase threshold voltage window can be achieved with fast voltage pulses by adequate choice of tunnel and control dielectric. The feasibility of dual bit storage is also proven showing that the nanocrystals are separated and the inter-dot tunneling is inhibited. Good endurance and retention behaviors are demonstrated even after long cycling. © 2004 Elsevier Ltd. All rights reserved.

KW - Flash memory; Nanocrystals; Reliability; Electrical and Electronic Engineering; Electronic, Optical and Magnetic Materials; Condensed Matter Physics

UR - http://hdl.handle.net/10447/179566

M3 - Article

VL - 48

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EP - 1488

JO - Solid-State Electronics

JF - Solid-State Electronics

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