Nanocrystals memory cells, in which the conventional polysilicon floating gate is replaced by an array of silicon nanocrystals, have been fabricated and characterized. Single cells and cell arrays of 1 Mb and 10 k have been realized by using a conventional 0.15 μm FLASH technology. Si nanocrystals are deposited on top of tunnel oxide by chemical vapor deposition. Properties of the memory cell have been investigated both for NAND and NOR applications in terms of program/erase window and programming times. Suitable program/erase threshold voltage window can be achieved with fast voltage pulses by adequate choice of tunnel and control dielectric. The feasibility of dual bit storage is also proven showing that the nanocrystals are separated and the inter-dot tunneling is inhibited. Good endurance and retention behaviors are demonstrated even after long cycling. © 2004 Elsevier Ltd. All rights reserved.
|Numero di pagine||6|
|Stato di pubblicazione||Published - 2004|
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