The energy and spatial profiling of the interface and near-interface traps in n-channel MOSFETs with SiO2/Al2O3 gate dielectrics is investigated by charge-pumping (CP) measurements. By increasing the amplitude as well as lowering the frequency of the gate pulse, an increase of the charge recombined per cycle was observed, and it was explained by the contributions of additional traps located higher in energy and deeper in position at the SiO2/Al2O3 interface. In addition, CP currents, acquired after different constant voltage stress, have been used to investigate the trap generation in this dielectric stack. © 2006 IEEE.
|Numero di pagine||7|
|Rivista||IEEE Transactions on Device and Materials Reliability|
|Stato di pubblicazione||Published - 2006|
All Science Journal Classification (ASJC) codes
- Electronic, Optical and Magnetic Materials
- Safety, Risk, Reliability and Quality
- Electrical and Electronic Engineering