Efficient FPGA Implementation of an Adaptive Noise Canceller

Giuseppe Costantino Giaconia, Antonio Di Stefano

Risultato della ricerca: Otherpeer review

19 Citazioni (Scopus)

Abstract

A hardware implementation of an adaptive noise canceller (ANC) is presented. It has been synthesized within an FPGA, using a modified version of the least mean square (LMS) error algorithm. The results obtained so far show a significant decrease of the required gate count when compared with a standard LMS implementation, while increasing the ANC bandwidth and signal to noise (S/N) ratio. This novel adaptive noise canceller is then useful for enhancing the S/N ratio of data collected from sensors (or sensor arrays) working in noisy environment, or dealing with potentially weak signals.
Lingua originaleEnglish
Pagine87-89
Numero di pagine3
Stato di pubblicazionePublished - 2005

All Science Journal Classification (ASJC) codes

  • Engineering(all)

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