Minimizing a quality metric for an MCML gate, such as power-delay product or energy-delay product, requires solving a system of nonlinear equations subject to constraints on both bias current and voltage swing. In this paper, we will show that the limits of the swing and the bias current are affected by the constraints on maximum area and maximum delay. Moreover, methods for computing such limits are presented.
|Numero di pagine||4|
|Stato di pubblicazione||Published - 2005|
All Science Journal Classification (ASJC) codes
- Electrical and Electronic Engineering