The architecture of a general purpose fuzzy logic coprocessor and its implementation on an FPGA based System on Chip is described. Thanks to its ability to support a fast dynamic reconfiguration of all its parameters, it is suitable for implementing adaptive fuzzy logic algorithms, or for the execution of different fuzzy algorithms in a time sharing fashion. The high throughput obtained using a pipelined structure and the efficient data organization allows significant increase of the computational capabilities strongly desired in applications with hard real-time constraints.
|Titolo della pubblicazione ospite||Computational Intelligence and Bioinspired Systems
8th International Workshop on Artificial Neural Networks, IWANN 2005
Vilanova i la Geltru; Spain; 8 June 2005 through 10 June 2005
|Numero di pagine||8|
|Stato di pubblicazione||Published - 2005|
|Nome||LECTURE NOTES IN COMPUTER SCIENCE|